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HARDWARE ORIENTED MODELING OF LLM ACCELERATOR
PIPELINE

tarihinde Adsız tarafından gönderildi
MSc Thesis📅 19.10.2026 — 15:40
👤 Speaker:
ARDA CEKIC
🎓 Supervisor(s):
ASSOC.PROF.DR.SEYDA ERTEKIN
📍 Location:
A105
⏲ Duration:
90 min.
📝 Abstract:

Large Language Models (LLMs) achieve strong performance in many natural lan- guage processing tasks, but their high computational and memory requirements make hardware deployment challenging. Quantization reduces these costs by using low- precision weights and activations, yet practical accelerator design also requires mod- eling integer arithmetic, accumulator precision, re-scaling, quantization-domain tran- sitions, and data movement. This thesis presents a Python-based hardware-oriented modeling framework for quantized LLM inference based on SmoothQuant-style post- training quantization. The framework models key decoder stages, including Normal- ization layers, projection layers, attention matrix multiplications, MLP operations, element-wise operations, INT8 operands, INT32 accumulation, and output re-scaling. It is integrated into a Neural Compressor-based evaluation flow and evaluated on six model families (OPT, LLaMA, Qwen, StableLM, Gemma, and Mistral) using LAM- BADA, Winogrande, PIQA, and WikiText. The evaluations examine the effects of quantization on predictive quality, while integer-domain sparsity is analyzed to iden- tify opportunities for future sparse-aware hardware design.

Time - Location
2026-10-19 15:40:00